Felisp
84436a5ae0
http://my.svgalib.org/svgalib/svgalib-1.9.25.tar.gz http://my.svgalib.org/svgalib/
108 lines
3.5 KiB
C
108 lines
3.5 KiB
C
#include <linux/pci.h>
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#include <linux/mm.h>
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#include <asm/io.h>
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#include "kernel26compat.h"
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#include "svgalib_helper.h"
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#ifndef NO_TASK
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void set_displaystart(struct sh_pci_device *dev) {
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int i, id;
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long ad;
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switch(dev->vendor) {
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case PCI_VENDOR_ID_MATROX:
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ad=dev->startad>>3;
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writeb(0x0c, dev->membase+0x3D4);
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writeb((ad & 0xFF00)>>8, dev->membase+0x3D5);
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writeb(0x0d, dev->membase+0x3D4);
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writeb(ad & 0xFF, dev->membase+0x3D5);
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writeb(0x00, dev->membase+0x3DE);
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i=readb(dev->membase+0x3DF) & 0xb0;
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i|=(ad & 0xf0000)>>16;
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i|=(ad & 0x100000)>>14;
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writeb(i, dev->membase+0x3DF);
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break;
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#if 0
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case PCI_VENDOR_ID_SI: /* SiS */
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dev->iobase = dev->mem[2]-0x380;
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dev->test_vsync = io_test_vsync;
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dev->ack_vsync = io_ack_vsync;
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dev->enable_vsync = io_enable_vsync;
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break;
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#endif
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case PCI_VENDOR_ID_NVIDIA_SGS:
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if(dev->id<0x20) {
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ad=dev->startad>>2;
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writeb(0x0c, dev->membase+0x6013D4);
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writeb((ad & 0xFF00)>>8, dev->membase+0x6013D5);
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writeb(0x0d, dev->membase+0x6013D4);
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writeb(ad & 0xFF, dev->membase+0x6013D5);
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writeb(0x19, dev->membase+0x6013D4);
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i=readb(dev->membase+0x6013D5) & 0xe0;
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i|=(ad & 0x1f0000)>>16;
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writeb(i, dev->membase+0x6013D5);
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writeb(0x2D, dev->membase+0x6013D4);
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i=readb(dev->membase+0x6013D5) & 0x9f;
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i|=(ad & 0x600000)>>16;
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writeb(i, dev->membase+0x6013D5);
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} else {
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}
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break;
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#if 0
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case PCI_VENDOR_ID_NVIDIA:
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dev->iobase = (unsigned long)ioremap(dev->mem[0],0x800000);
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dev->test_vsync = nv4_test_vsync;
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dev->ack_vsync = nv4_ack_vsync;
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dev->enable_vsync = nv4_enable_vsync;
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break;
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case PCI_VENDOR_ID_ATI:
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id=dev->id;
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if( (id==0x4c45) ||
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(id==0x4c46) ||
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(id==0x4c57) ||
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(id==0x4c59) ||
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(id==0x4c5a) ||
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(id==0x4d46) ||
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(id==0x4d4c) ||
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(id==0x4242) ||
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((id>>8)==0x50) ||
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((id>>8)==0x51) ||
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((id>>8)==0x52) ||
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((id>>8)==0x53) ||
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((id>>8)==0x54)) {
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dev->iobase = (unsigned long)ioremap(dev->mem[2], 16384);
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dev->test_vsync = r128_test_vsync;
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dev->ack_vsync = r128_ack_vsync;
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dev->enable_vsync = r128_enable_vsync;
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} else {
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dev->iobase = dev->mem[1];
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dev->test_vsync = rage_test_vsync;
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dev->ack_vsync = rage_ack_vsync;
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dev->enable_vsync = rage_enable_vsync;
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}
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break;
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case PCI_VENDOR_ID_RENDITION:
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dev->iobase = dev->mem[1];
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dev->test_vsync = rendition_test_vsync;
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dev->ack_vsync = rendition_ack_vsync;
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dev->enable_vsync = rendition_enable_vsync;
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break;
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case PCI_VENDOR_ID_S3:
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dev->iobase = (unsigned long)ioremap(dev->mem[0]+0x1000000, 0x10000);
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dev->test_vsync = s3_test_vsync;
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dev->ack_vsync = s3_ack_vsync;
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dev->enable_vsync = s3_enable_vsync;
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break;
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default:
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dev->test_vsync = vga_test_vsync;
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dev->ack_vsync = vga_ack_vsync;
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dev->enable_vsync = vga_enable_vsync;
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dev->iobase = 0;
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#endif
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}
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}
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#endif
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